A bus is a collection of wires, chips and slots inside the computer through which data are transmitted from one part of the computer to another from peripheral devices. It is also called a pathway in the computer on which data travels. It is a set of parallel distinct wires, serving different purposes, which allow devices attached to it to communicate with the CPU.
The bus architecture in computer system is as shown below:
Figure: Bus Architecture
The function of BUS are:
There are three main part of bus. They are described below:
It carries the control signal. The control signal is used for controlling and coordinating the various activities of the computer. It is generated from the control unit of the CPU. Different architectures result in a different number of lines within the control bus, as each line is used to perform a specific task.
For instance, different specific lines are used for each of read, write and reset requests. These are not a group of lines like address bus and data bus, but individual lines that provide a pulse to indicate a microprocessor operation. The control unit generates a specific control signal for every operation, such as memory read or input/output operation. This signal is also used to identify a device type, with which the microprocessor intends to communicate.
Fig: Control Bus
Address bus carries memory address within the device. It allows the CPU to reference memory locations within the device. It connects the CPU and other peripherals and carries only memory address. In a computer system, each peripheral or memory location is identified by a numerical value, called an address and the address bus is used to carry this numerical value as well as it also contains a few control lines to carry control commands. The address bus is unidirectional, bits flow in one direction from the processor to peripherals.
The processor uses the address bus to perform the first function of identifying a peripheral or a memory location. The address bus contains the connections between the processor and memory that carry the signals relating to the address which the CPU is processing at that time, such as the locations that the CPU is reading from or writing to. The processor uses the address bus to perform, identifying a peripheral or a memory location.
When the address bus carries 8 bit at a time, the CPU could address only 256 (i.e. 28) bytes of RAM. Most of the early PCs had 20 bit address buses. So, CPU could address 220bytes of data. Now, with 32-bit address buses, CPU can address 4GB of RAM. If there is wider bus path, more information can be processed at a time and hence, it also affects the processing speed of a computer.
Fig: Address Bus
Data bus transfer data from one location to another across the computer. On these lines, the meaningful data which is to be retrieved from a device is placed. Data bus is used by CPU to transfer data. It may be 16-bit or 32-bit data bus. It is an electrical path that connects the CPU, memory and other hardware devices on the motherboard. These lines are bidirectional in which the data flows in both directions between the processor and memory and peripheral devices. The number of wires in the bus affects the speed at which data can be travel between hardware components just as the number of lanes on a highway affects the time it takes people to reach their destination. Each wire can transfer 1 bit of data at a time and 8 wire bus can move 8 bit at a time, which is 1-byte data at a time. A 16-bit bus can transfer 2 bytes. 32 bits can transfer 4 bytes and so on. Intel 80286 microprocessor used16 bit data bus and Intel 80386 used 32-bit data bus. When the data bus width grows larger, more data can be transferred.
The transmission of the data on bus lines takes place between approximately 1M baud for the microcomputer to about 1000 M baud or more for the large more expensive computers (1 baud = 1 bit/sec). Communication between the different units of a processing system is carried out along address and data bus and also along various control lines. All control operations are governed by the master timing source and clock.
Fig: Data Bus
(Shrestha & Manandhar, 2014)
Shrestha, R. P., & Manandhar, s. (2014). Computer Essential. Kathmandu: Ashmita publication.